Usage Notes; Notes On Register Access; Figure 14.6 Writing To Tcnt And Tcsr (Wdt_0) - Renesas H8S Series Hardware Manual

Section 14 Watchdog Timer (WDT)
14.6

Usage Notes

14.6.1

Notes on Register Access

The watchdog timer's registers, TCNT and TCSR differ from other registers in being more
difficult to write to. The procedures for writing to and reading from these registers are given
below.
(1) Writing to TCNT and TCSR (Example of WDT_0)
These registers must be written to by a word transfer instruction. They cannot be written to by a
byte transfer instruction.
TCNT and TCSR both have the same write address. Therefore, satisfy the relative condition
shown in figure 14.6 to write to TCNT or TCSR. To write to TCNT, the higher bytes must contain
the value H'5A and the lower bytes must contain the write data before the transfer instruction
execution. To write to TCSR, the higher bytes must contain the value H'A5 and the lower bytes
must contain the write data.
<TCNT write>
Address : H'FFA8
<TCSR write>
Address : H'FFA8
Rev. 3.00 Jul. 14, 2005 Page 424 of 986
REJ09B0098-0300
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Figure 14.6 Writing to TCNT and TCSR (WDT_0)

8 7
H'5A
8 7
H'A5
0
Write data
0
Write data