Renesas H8S Series Hardware Manual page 708

Section 18 LPC Interface (LPC)
Bit Bit Name Initial Value Slave
2 FLEERR 0

1, 0 All 0
Notes: 1. Only 0 can be written to clear the flag.
2. Only 1 can be written to set the flag.
• LMCST2
Bit Bit Name Initial Value Slave Host Description
7 PROTECT 0
6 LMCBUSY 0
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R/W
Host Description
2
R/(W)* R Flash Memory Erasing Error
0: Flash memory has been completed erasure
[Clearing condition]
Clearing by the clear status command
1: Flash memory erasing error has been occurred
R R Reserved
These bits are read as 0 and cannot be modified.
R/W
R R Indicates protect information in an LPC/FW memory
cycle.
[Updating conditions]
•
Data read command (flash memory/on-chip
RAM)
•
FLWAR set command
•
Data write command (flash memory) (except for
the case where an receive address does not
match the FLWAR)
•
Data write command (on-chip RAM)
0: Not protected
1: Protected
R R Indicates whether the on-chip RAM or RAM buffer is
being written.
0: Wait for write access has been completed or
write access has already been completed
1: Write access is in progress