Renesas H8S Series Hardware Manual page 879

Bit Bit Name
31 TS3
30 TS2
29 TS1
28 TS0
27 to 14 

13

12

11

10

9, 8

7 to 1

0
Initial Value R/W
1 R
1 R
1 R
0 R
All 0 R
1 R
0 R
1 R
0 R
All 1 R
All 0 R
1 R
Description
Test Set Bits
0000: EXTEST mode
0001: Setting prohibited
0010: CLAMP mode
0011: HIGHZ mode
0100: SAMPLE/PRELOAD mode
0101: Setting prohibited
: :
1101: Setting prohibited
1110: IDCODE mode (Initial value)
1111: BYPASS mode
Reserved
These bits are always read as 0 and cannot be
modified.
Reserved
This bit is always read as 1 and cannot be modified.
Reserved
This bit is always read as 0 and cannot be modified.
Reserved
This bit is always read as 1 and cannot be modified.
Reserved
This bit is always read as 0 and cannot be modified.
Reserved
These bits are always read as 1 and cannot be
modified.
Reserved
These bits are always read as 0 and cannot be
modified.
Reserved
This bit is always read as 1 and cannot be modified.
Rev. 3.00 Jul. 14, 2005 Page 831 of 986
Section 22 Boundary Scan (JTAG)
REJ09B0098-0300