Renesas H8S Series Hardware Manual page 46

16-bit single-chip microcomputer
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Clock Input to TCNT and Count Condition (2).................................................... 387
Registers Accessible by TMR_X/TMR_Y ........................................................... 396
Input Capture Signal Selection ............................................................................. 405
Timer Output Priorities......................................................................................... 410
Switching of Internal Clocks and TCNT Operation ............................................. 411
Section 14 Watchdog Timer (WDT)
Pin Configuration.................................................................................................. 415
WDT Interrupt Source .......................................................................................... 423
Section 15 Serial Communication Interface (SCI, IrDA)
Pin Configuration.................................................................................................. 430
(Smart Card Interface Mode, n = 0, s = 372) ........................................................ 452
(Smart Card Interface Mode, S = 372).................................................................. 452
Serial Transfer Formats (Asynchronous Mode)................................................ 456
SSR Status Flags and Receive Data Handling .................................................. 463
IrCKS2 to IrCKS0 Bit Settings......................................................................... 495
SCI Interrupt Sources........................................................................................ 496
SCI Interrupt Sources........................................................................................ 497
2
Section 16 I
C Bus Interface (IIC)
Pin Configuration.................................................................................................. 509
Communication Format ........................................................................................ 513
2
C Transfer Rate .................................................................................................. 516
Flags and Transfer States (Master Mode) ............................................................. 522
Flags and Transfer States (Slave Mode) ............................................................... 524
2
C Bus Data Format Symbols.............................................................................. 536
Operation by Using DTC...................................................................................... 566
IIC Interrupt Sources ............................................................................................ 569
2
C Bus Timing (SCL and SDA Outputs)............................................................. 570
2
Table 16.11
I
C Bus Timing (with Maximum Influence of t
Rev. 3.00 Jul. 14, 2005 Page xlvi of xlviii
) Values ........................................................... 571
sr
/t
Sr
Sf
)........................................ 572

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