Renesas H8S Series Hardware Manual page 807

(c) Flash pass/fail result parameter (FPFR: general register R0L of CPU)
This parameter indicates the return value of the programming processing result.
Initial
Bit Bit Name Value
 
7

6 MD

5 EE
Section 21 Flash Memory (0.18-µm F-ZTAT Version)
R/W Description

Unused
The return value is 0.
R/W Programming Mode Related Setting Error Detect
Returns the check result whether a high level signal is
input to the FWE pin or whether the error-protection
state is not entered. When a low-level signal is input to
the FWE pin or the error-protection state is entered, 1 is
written to this bit. These states can be confirmed with the
FWE and FLER bits in FCCS. For conditions to enter the
error-protection state, see section 21.5.3, Error
Protection.
0: FWE and FLER settings are normal (FWE = 1,
FLER = 0)
1: Programming cannot be performed because FWE =
0 or FLER = 1
R/W Programming Execution Error Detect
1 is returned to this bit when the specified data could not
be written because the user MAT was not erased. If this
bit is set to 1, there is a high possibility that the user
MAT is partially rewritten. In this case, after removing the
error factor, erase the user MAT. If FMATS is set to
H'AA and the user boot MAT is selected, an error occurs
when programming is performed. In this case, both the
user MAT and user boot MAT are not rewritten.
Programming of the user boot MAT should be performed
in boot mode or programmer mode.
0: Programming has ended normally
1: Programming has ended abnormally and
programming result is not guaranteed
Rev. 3.00 Jul. 14, 2005 Page 759 of 986
REJ09B0098-0300