Renesas H8S Series Hardware Manual page 825

A single divided block is erased by one erasing processing. For block divisions, refer to figure
21.4. To erase two or more blocks, update the erase-block number and perform the erasing
processing for each block.
(a) Select the on-chip program to be downloaded
Set the EPVB bit in FECS to 1.
Several programming/erasing programs cannot be selected at one time. If several programs are set,
download is not performed and a download error is reported to the SS bit in the DPFR parameter.
Specify the start address of the download destination by FTDAR.
The procedures to be carried out after setting FKEY, e.g. download and initialization, are the same
as those in the programming procedure. For details, see section 21.4.2 (2), Programming
Procedure in User Program Mode.
The procedures after setting parameters for erasing programs are as follows:
(b) Set the FEBS parameter necessary for erasure
Set the erase-block number of the user MAT in the flash erase block select parameter FEBS
(general register ER0). If a value other than an erase-block number of the user MAT is set, no
block is erased even though the erasing program is executed, and an error is returned to the return
value parameter FPFR.
(c) Erasure
Similar to as in programming, there is an entry point for the erasing program in the area from the
start address of a download destination specified by FTDAR + 16 bytes. The subroutine is called
and erasing is executed by using the following steps.
MOV.L #DLTOP+16,ER2
JSR @ER2
NOP
• The general registers other than R0L are saved in the erasing program.
• R0L is a return value of the FPFR parameter.
• Since the stack area is used in the erasing program, a 128-byte stack area at the maximum must
be allocated in RAM.
Section 21 Flash Memory (0.18-µm F-ZTAT Version)
; Set entry address to ER2
; Call erasing routine
Rev. 3.00 Jul. 14, 2005 Page 777 of 986
REJ09B0098-0300