Figure 5.2 Relation Between Irq7 And Irq6 Interrupts, Kin15 To Kin0 Interrupts - Renesas H8S Series Hardware Manual

KMIMR0 (Initial value of 1)
P60/KIN0
KMIMR5 (Initial value of 1)
P65/KIN5
KMIMR6 (Initial value of 0)
P66/KIN6/IRQ6
KMIMR7 (Initial value of 1)
P67/KIN7/IRQ7
P42/ExIRQ7
KMIMR8 (Initial value of 1)
PA0/KIN8
KMIMR9 (Initial value of 1)
PA1/KIN9
WUEMR7 (Initial value of 1)
PB7/WUE7
Note: The ISS7 bit is an external interrupt pin switch bit. For details, see section 5.3.8,
IRQ Sence Port Select Register 16 (ISSR16), IRQ Sense Port Select Register (ISSR).

Figure 5.2 Relation between IRQ7 and IRQ6 Interrupts, KIN15 to KIN0 Interrupts,

WUE7 to WUE0 Interrupts, KMIMR, KMIMRA, and WUEMRB
(H8S/2140B Group Compatible Vector Mode: EIVS = 0)
In H8S/2140B Group compatible vector mode, interrupt input from the IRQ7 pin is ignored when
even one of the KMIMR15 to KMIMR8 and WUEMR7 to WUEMR0 bits is cleared to 0. If the
KIN7 to KIN0 pins or KIN15 to KIN8 pins, and WUE7 to WUE0 pins are specified to be used as
key-sensing interrupt input pins and wake-up event interrupt input pins, the interrupt sensing
condition for the corresponding interrupt source (IRQ6 or IRQ7) must be set to low-level sensing
or falling-edge sensing. Note that interrupt input cannot be made from the ExIRQ6 pin.
ISS7
Section 5 Interrupt Controller
IRQ6 internal
Edge-level selection
signal
enable/disable
circuit
IRQ7 internal
Edge-level selection
signal
enable/disable
circuit
Rev. 3.00 Jul. 14, 2005 Page 95 of 986
IRQ6 interrupt
IRQ7 interrupt
REJ09B0098-0300