Effective Address Calculation; Table 2.13 Effective Address Calculation (1) - Renesas H8S Series Hardware Manual

Section 2 CPU
2.7.9

Effective Address Calculation

Table 2.13 indicates how effective addresses are calculated in each addressing mode. In normal
mode, the upper eight bits of the effective address are ignored in order to generate a 16-bit
address.

Table 2.13 Effective Address Calculation (1)

Addressing Mode and Instruction Format
Register direct (Rn)
Register indirect (@ERn)
Register indirect with post-increment or
pre-decrement
• Register indirect with post-increment @ERn+
• Register indirect with pre-decrement @-ERn
Rev. 3.00 Jul. 14, 2005 Page 52 of 986
REJ09B0098-0300
Effective Address Calculation
General register contents
General register contents
Sign extension
General register contents
1, 2, or 4
General register contents
1, 2, or 4
Operand Size
Byte
Word
Longword
Effective Address (EA)
Operand is general register contents.