Address Space Set Register (Assr) - Renesas H8S Series Hardware Manual

Section 18 LPC Interface (LPC)

18.3.23 Address Space Set Register (ASSR)

ASSR selects the flash memory address space to be used by the host and slave. The contents of
this register must not be changed in LPC/FW memory cycles (while LMCE is set to 1).
Bit Bit Name Initial Value Slave Host Description
7 AS13 0
6 AS12 0
5 AS11 0
4 AS10 0
3 AS23 0
2 AS22 0
1 AS21 0
0 AS20 0
Rev. 3.00 Jul. 14, 2005 Page 668 of 986
REJ09B0098-0300
R/W

R/W Select flash memory address space 1.

R/W AS13 AS12 AS11 AS10

R/W 0

R/W 0
0
0
0
0
0
0
B'1000 to B'1111 must not be selected.

R/W Select flash memory address space 2.

R/W AS23 AS22 AS21 AS20

R/W 0
R/W 0

0
0
0
0
0
0
B'1000 to B'1111 must not be selected.
0 0 0 : 64 kbytes
0 0 1 : 128 kbytes
0 1 0 : 256 kbytes
0 1 1 : 384 kbytes
1 0 0 : 512 kbytes
1 0 1 : 640 kbytes
1 1 0 : 768 kbytes
1 1 1 : 1 Mbyte
0 0 0 : 64 kbytes
0 0 1 : 128 kbytes
0 1 0 : 256 kbytes
0 1 1 : 384 kbytes
1 0 0 : 512 kbytes
1 0 1 : 640 kbytes
1 1 0 : 768 kbytes
1 1 1 : 1 Mbyte