System Control Register 3 (Syscr3) - Renesas H8S Series Hardware Manual

Section 3 MCU Operating Modes
3.2.4

System Control Register 3 (SYSCR3)

SYSCR3 selects the register map and interrupt vector.
Bit Bit Name
7 —
6 EIVS*
5 RELOCATE
4 to 0 —
Note: Switch the modes when an interrupt occurrence is disabled.
*
Rev. 3.00 Jul. 14, 2005 Page 66 of 986
REJ09B0098-0300
Initial Value R/W Description
0 R/W Reserved
0 R/W Extended interrupt Vector Select*
0 R/W Register Address Map Select
All 0 R/W Reserved
The initial value should not be changed.
Selects compatible mode or extended mode for the
interrupt vector table.
0: H8S/2140B Group compatible vector mode
1: Extended vector mode
For details, see section 5, Interrupt Controller.
Selects compatible mode or extended mode for the
register map.
When extended mode is selected for the register
map, CPU access for registers can be controlled
without using the KINWUE bit in SYSCR or the IICE
bit in STCR to switch the registers to be accessed.
0: H8S/2140B Group compatible register map mode
1: Extended register map mode
For details, see section 25, List of Registers.
The initial value should not be changed.