Figure 21.11 Programming Procedure - Renesas H8S Series Hardware Manual

Section 21 Flash Memory (0.18-µm F-ZTAT Version)
(2) Programming Procedure in User Program Mode
The procedures for download, initialization, and programming are shown in figure 21.11.
Start programming procedure
program
Select on-chip program
to be downloaded and
specify download
destination by FTDAR
Set FKEY to H'A5
Set SCO to 1 and
execute download
Clear FKEY to 0
DPFR = 0?
Yes
Set the FPEFEQ
parameter
Initialization
JSR FTDAR setting + 32
FPFR = 0 ?
Yes
1
The procedure program must be executed in an area other than the flash memory to be
programmed. Especially the part where the SCO bit in FCCS is set to 1 for downloading must be
executed in the on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM and user
MAT) is shown in section 21.4.4, Storable Areas for Procedure Program and Program Data.
The following description assumes the area to be programmed on the user MAT is erased and
program data is prepared in the consecutive area. When erasing has not been done yet, execute
erasing before writing.
Rev. 3.00 Jul. 14, 2005 Page 770 of 986
REJ09B0098-0300
(a)
(b)
(c)
(d)
(e)
No
Download error processing
(f)
(g)
(h)
No
Initialization error processing

Figure 21.11 Programming Procedure

1
Disable interrupts and
bus master operation
other than CPU
Set FKEY to H'5A
Set the parameters to
ER1 and ER0
(FMPAR, FMPDR)
Programming
JSR FTDAR setting + 16
FPFR = 0?
Yes
Clear FKEY Programming
No Required block
programming is
completed?
Yes
Clear FKEY to 0
End programming
procedure program
(i)
(j)
(k)
(l)
(m)
No
error processing
(n)
(o)