Table 18.11 List Of Factors That Prevents Sync Field Being Sent Back - Renesas H8S Series Hardware Manual

Table 18.11 lists the factors that prevent the SYNC from being sent back in an LPC/FW memory
read cycle.

Table 18.11 List of Factors that Prevents SYNC Field being Sent Back

Command Factor
Common to all Start not match
commands
Device selection not match
Address not match
Size error
Data read Reading address which has already been
accessed disabled
Accessing on-chip memory is in progress LMCBUSY = 1
Interrupt processing is in progress
Block erasure Erasure command disabled
Erasure protect blocks
Erase block number error
On-chip memory access is in progress
Interrupt processing is in progress
Section 18 LPC Interface (LPC)
Remarks
In FW memory access cycle
In FW memory access cycle (other than
byte, word, longword)
According to the FRPR/RAMRE register
settings
While following processes are in
progress:
•
Programming flash memory
(FLPI = 1)
•
Erasing flash memory (FLEI = 1)
•
Initializing buffer (BUFINII = 1)
•
Processing user command (USERI
= 1)
ERASEE = 0
According to the FWPR register setting
Other than 0 to 23
LMCBUSY = 1
While following processes are in
progress:
•
Programming flash memory
(FLPI = 1)
•
Erasing flash memory (FLEI = 1)
•
Initializing buffer (BUFINII = 1)
•
Processing user command (USERI
= 1)
Rev. 3.00 Jul. 14, 2005 Page 697 of 986
REJ09B0098-0300