Renesas H8S Series Hardware Manual page 39
16-bit single-chip microcomputer
Hide thumbs
Also See for H8S Series:
- Hardware manual (1047 pages) ,
- User manual (38 pages) ,
- Hardware manual (875 pages)
Table of Contents
Advertisement
Figure 18.7 Clock Start Request Timing .................................................................................... 689
Figure 18.8 Example of Command Space Setting ...................................................................... 692
Figure 18.9 Example of Flash Memory Address Translation ..................................................... 700
Figure 18.10 Example of On-Chip RAM Address Translation .................................................. 701
Figure 18.11 Example 1 of Address Space Priority.................................................................... 703
Figure 18.12 Example 2 of Address Space Priority.................................................................... 704
Figure 18.13 Flash Memory Protection ...................................................................................... 706
Figure 18.14 Protected Address Space in On-Chip RAM .......................................................... 707
Figure 18.15 Example of Programming Flash Memory ............................................................. 708
Figure 18.16 Example of Erasing Flash Memory ....................................................................... 709
Figure 18.17 HIRQ Flowchart (Example of Channel 1)............................................................. 713
Section 19 A/D Converter
Figure 19.1 Block Diagram of A/D Converter ........................................................................... 718
Figure 19.2 A/D Conversion Timing .......................................................................................... 725
Figure 19.3 External Trigger Input Timing ................................................................................ 726
Figure 19.4 A/D Conversion Accuracy Definitions.................................................................... 728
Figure 19.5 A/D Conversion Accuracy Definitions.................................................................... 728
Figure 19.6 Example of Analog Input Circuit ............................................................................ 729
Figure 19.7 Example of Analog Input Protection Circuit ........................................................... 731
Figure 19.8 Analog Input Pin Equivalent Circuit ....................................................................... 731
Section 21 Flash Memory (0.18-µm F-ZTAT Version)
Figure 21.1 Block Diagram of Flash Memory............................................................................ 736
Figure 21.2 Mode Transition for Flash Memory ........................................................................ 737
Figure 21.3 Flash Memory Configuration .................................................................................. 739
Figure 21.4 Block Division of User MAT (1) ............................................................................ 740
Figure 21.4 Block Division of User MAT (2) ............................................................................ 741
Figure 21.5 Overview of User Procedure Program..................................................................... 742
Figure 21.6 System Configuration in Boot Mode....................................................................... 765
Figure 21.7 Automatic-Bit-Rate Adjustment Operation of SCI ................................................. 765
Figure 21.8 Overview of Boot Mode State Transition Diagram................................................. 767
Figure 21.9 Programming/Erasing Overview Flow.................................................................... 768
Figure 21.10 RAM Map when Programming/Erasing is Executed ............................................ 769
Figure 21.11 Programming Procedure........................................................................................ 770
Figure 21.12 Erasing Procedure.................................................................................................. 776
Figure 21.13 Repeating Procedure of Erasing and Programming............................................... 778
Figure 21.14 Procedure for Programming User MAT in User Boot Mode ................................ 780
Figure 21.15 Procedure for Erasing User MAT in User Boot Mode .......................................... 782
Figure 21.16 Transitions to Error-Protection State..................................................................... 794
Figure 21.17 Switching between User MAT and User Boot MAT ............................................ 795
Rev. 3.00 Jul. 14, 2005 Page xxxix of xlviii
Advertisement
Table of Contents
