Low-Power Control Register (Lpwrcr); Table 24.1 Operating Frequency And Wait Time - Renesas H8S Series Hardware Manual

Section 24 Power-Down Modes

Table 24.1 Operating Frequency and Wait Time

STS2 STS1 STS0 Wait Time
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Recommended specification
Note: Setting prohibited.
*
24.1.2

Low-Power Control Register (LPWRCR)

LPWRCR controls power-down modes.
Initial
Bit Bit Name Value
7 DTON 0
Rev. 3.00 Jul. 14, 2005 Page 862 of 986
REJ09B0098-0300
20 MHz
8192 states 0.4
16384 states 0.8
32768 states 1.6
65536 states 3.3
131072 states 6.6
262144 states 13.1

Reserved
16 states* 0.8
R/W Description
R/W Direct Transfer On Flag
Specifies the operating mode to be entered after executing the
SLEEP instruction.
When the SLEEP instruction is executed in high-speed mode or
medium-speed mode:
0: Shifts to sleep mode, software standby mode, or watch mode
1: Shifts directly to subactive mode, or shifts to sleep mode or
software standby mode
When the SLEEP instruction is executed in subactive mode:
0: Shifts to subsleep mode or watch mode
1: Shifts directly to high-speed mode, or shifts to subsleep mode
10 MHz 8 MHz
0.8 1.0
1.6 2.0
3.3 4.1
6.6 8.2
13.1 16.4
26.2 32.8
 
1.6 2.0
6 MHz 4 MHz
1.3 2.0
2.7 4.1
5.5 8.2
10.9 16.4
21.8 32.8
43.6 65.6
 
2.7 4.0
Unit
ms

µs