Figure 18.5 Power-Down State Termination Timing - Renesas H8S Series Hardware Manual

Section 18 LPC Interface (LPC)
Items Initialized
LRESET signal
LPCPD signal
LAD3 to LAD0, LFRAME, LCLK, SERIRQ, CLKRUN signals
PME, LSMI, LSCI, GA20 signals (when function is selected)
PME, LSMI, LSCI, GA20 signals (when function is not selected)
Note: System reset: Reset by STBY input, RES input, or WDT overflow
LPC reset: Reset by LPC hardware reset (HR) or LPC software reset (SR)
LPC shutdown: Reset by LPC hardware shutdown (HS) or LPC software shutdown (SS)
Figure 18.5 shows the timing of the LPCPD and LRESET signals.
LCLK
LPCPD
LAD3 to LAD0
LFRAME
LRESET
Rev. 3.00 Jul. 14, 2005 Page 686 of 986
REJ09B0098-0300
At least 30 µs

Figure 18.5 Power-Down State Termination Timing

System
Reset LPC Reset
Input (port Input
function
Input
Input
Output
Port function Port function
At least 100 µs
At least 60 µs
LPC
Shutdown
Input
Input
Hi-Z
Hi-Z