Kbf Setting Timing And Kclk Control; Figure 17.11 Kbf Setting And Kclk Automatic I/O Inhibit Generation Timing - Renesas H8S Series Hardware Manual

Section 17 Keyboard Buffer Control Unit (KBU)
17.4.6

KBF Setting Timing and KCLK Control

Figure 17.11 shows the KBF setting timing and the KCLK pin states.
φ*
KCLK
(pin)
Internal
KCLK
Falling edge
signal
RXCR3 to
B'1010
RXCR0
KBF
KCLK
(output)
The φ clock shown here is scaled by 1/N in medium-speed mode.
Note:*

Figure 17.11 KBF Setting and KCLK Automatic I/O Inhibit Generation Timing

Rev. 3.00 Jul. 14, 2005 Page 602 of 986
REJ09B0098-0300
11th fall
B'0000
Automatic I/O inhibit