Input/Output Pins; Register Descriptions; Table 10.1 Pin Configuration - Renesas H8S Series Hardware Manual

Section 10 14-Bit PWM Timer (PWMX)
10.2

Input/Output Pins

Table 10.1 lists the PWMX (D/A) module input and output pins.

Table 10.1 Pin Configuration

Name
PWMX output pin 0
PWMX output pin 1
10.3

Register Descriptions

The PWMX (D/A) module has the following registers. The PWMX (D/A) registers are assigned to
the same addresses with other registers. The registers are selected by the IICE bit in the serial
timer control register (STCR). For details on the module stop control register, see section 24.1.3,
Module Stop Control Register H, L, and A (MSTPCRH, MSTPCRL, MSTPCRA).
• PWMX (D/A) counter (DACNT)
• PWMX (D/A) data register A (DADRA)
• PWMX (D/A) data register B (DADRB)
• PWMX (D/A) control register (DACR)
• Peripheral clock select register (PCSR)
Note: The same addresses are shared by DADRA and DACR, and by DADRB and DACNT.
Switching is performed by the REGS bit in DACNT or DADRB.
Rev. 3.00 Jul. 14, 2005 Page 260 of 986
REJ09B0098-0300
Abbreviation I/O
PWX0 Output
PWX1 Output
Function
PWMX output of channel A
PWMX output of channel B