Table 10.6 Examples Of Brr Settings For Various Bit Rates (Asynchronous Mode) (2); Table 10.7 Relation Between N And Clock - Renesas H8/3847R Series Hardware Manual

Section 10 Serial Communication Interface

Table 10.6 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2)

OSC
10 MHz
Bit Rate Error
(bit/s) n N (%)
110 2 88 –0.25 2
150 2 64 0.16
200 2 48 –0.35 2
250 2 38 0.16
300 — — —
600 — — —
1200 0 129 0.16
2400 0 64 0.16
4800 — — —
9600 — — —
19200 — — —
31250 0 4 0
38400 — — —
Notes: 1. The setting should be made so that the error is not more than 1%.
2. The value set in BRR is given by the following equation:
OSC
N=
(64 × 2
where
B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0 ≤ N ≤ 255)
OSC: Value of φ
n: Baud rate generator input clock number (n = 0, 2, or 3)
(The relation between n and the clock is shown in table 10.7.)
Table 10.7
n Clock
φ
0
/2 *
φ
0
W
φ/16
2
φ/64
3
Rev. 6.00 Aug 04, 2006 page 366 of 680
REJ09B0145-0600
16 MHz
Error
n N (%)
141 0.03
2 103 0.16
77 0.16
2 62 –0.79
2 51 0.16
2 25 0.16
0 207 0.16
0 103 0.16
0 51 0.16
0 25 0.16
0 12 0.16
0 7 0
— — —
— 1
2n
× B)
(Hz)
OSC
Relation between n and Clock
SMR Setting
CKS1
0
1 * 2
/φ 0
W
1
1
CKS0
0
1
0
1