Texas Instruments OMAP5912 Reference Manual page 1682

5.8 Using Interrupts Between Block Transfers
6 SPI Operation Using the Clock Stop Mode
6.1 SPI Protocol
Figure 38. Typical SPI Interface
SPRU762B
Multichannel Selection Modes / SPI Operation Using the Clock Stop Mode
When a multichannel selection mode is used, an interrupt request can be sent
to the CPU at the end of every 16-channel block (at the boundary between
partitions and at the end of the frame). In the receive multichannel selection
mode, a receive interrupt (RINT) request is generated at the end of each block
transfer, if RINTM = 01b. In any of the transmit multichannel selection modes,
a transmit interrupt (XINT) request is generated at the end of each block
transfer if XINTM = 01b. When RINTM/XINTM = 01b, no interrupt is
generated unless a multichannel selection mode is on.
These interrupt pulses are active high and last for two CPU clock cycles.
This type of interrupt is especially helpful if you are using the two-partition
mode (described in section 5.4) and you want to know when you can assign
a different block of channels to partition A or B.
The SPI protocol is a master-slave configuration with one master device and
one or more slave devices. The interface consists of the following four signals:
Serial data input (also referred to as master in/slave out, or MISO)
-
Serial data output (also referred to as master out/slave in, or MOSI)
-
Shift-clock (also referred to as SCK)
-
Slave-enable signal (also referred to as SS)
-
A typical SPI interface with a single slave device is shown in Figure 38.
SPI-compliant
master
SPI Operation Using the Clock Stop Mode
SPI-compliant
SCK
SCK
MOSI
MOSI
MISO
MISO
SS SS
Multichannel Buffered Serial Ports (McBSPs)
slave
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