Contention Between Timer Counter (Tcnt) Write And Increment; Changing Value Of Cks2 To Cks0; Switching Between Watchdog Timer Mode And Interval Timer Mode; Figure 13.3 Contention Between Tcnt Write And Increment - Renesas H8S Series Hardware Manual

13.5.2

Contention between Timer Counter (TCNT) Write and Increment

If a timer counter clock pulse is generated during the T
takes priority and the timer counter is not incremented. Figure 13.3 shows this operation.
φ
Address
Internal write signal
TCNT input clock
TCNT

Figure 13.3 Contention between TCNT Write and Increment

13.5.3

Changing Value of CKS2 to CKS0

If bits CKS0 to CKS2 in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. Software must be used to stop the watchdog timer (by clearing the TME bit to
0) before changing the value of bits CKS0 to CKS2.
13.5.4

Switching between Watchdog Timer Mode and Interval Timer Mode

If the mode is switched from watchdog timer to interval timer while the WDT is operating, errors
could occur in the incrementation. Software must be used to stop the watchdog timer (by clearing
the TME bit to 0) before switching the mode.
state of a TCNT write cycle, the write
2
TCNT write cycle
T 1 T 2
N
Counter write data
Rev. 6.00 Mar 15, 2006 page 311 of 570
Section 13 Watchdog Timer
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REJ09B0211-0600