Receive Shift Register (Rsr); Receive Data Register (Rdr); Transmit Data Register (Tdr); Transmit Shift Register (Tsr) - Renesas H8S/2100 Series Hardware Manual

6-bit single-chip microcomputer

Hide thumbs Also See for H8S/2100 Series:

Table of Contents

Section 14 Serial Communication Interface (SCI)

Receive Shift Register (RSR)

RSR is a shift register used to receive serial data that converts it into parallel data. When one

frame of data has been received, it is transferred to RDR automatically. RSR cannot be directly

accessed by the CPU.

RDR is an 8-bit register that stores receive data. When the SCI has received one frame of serial

data, it transfers the received serial data from RSR to RDR where it is stored. After this, RSR can

receive the next data. Since RSR and RDR function as a double buffer in this way, continuous

receive operations be performed. After confirming that the RDRF bit in SSR is set to 1, read RDR

for only once. RDR cannot be written to by the CPU. The initial value of RDR is H'00.

TDR is an 8-bit register that stores transmit data. When the SCI detects that TSR is empty, it

transfers the transmit data written in TDR to TSR and starts transmission. The double-buffered

structures of TDR and TSR enable continuous serial transmission. If the next transmit data has

already been written to TDR when one frame of data is transmitted, the SCI transfers the written

data to TSR to continue transmission. Although TDR can be read from or written to by the CPU at

all times, to achieve reliable serial transmission, write transmit data to TDR for only once after

confirming that the TDRE bit in SSR is set to 1. The initial value of TDR is H'FF.

TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first

transfers transmit data from TDR to TSR, and then sends the data to the TxD pin. TSR cannot be

directly accessed by the CPU.

Rev. 1.00 May 09, 2008 Page 364 of 954

REJ09B0462-0100