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M16C/29 Group
13.5.3 Set/Reset Waveform Output (SR Waveform Output) Mode
Output level of the OUTC1j pin is inverted when the base timer value matches that of the G1POj register
value (j=0, 2, 4, 6). It is returned to default output level when the base timer value matches that of the
G1POk register (k=j+1). Table 13.5.3.1 lists specifications of SR waveform mode. Figure 13.5.3.1 lists an
example of the SR waveform mode operation.
Table 13.5.3.1. SR Waveform Output Mode Specifications
Item
Output waveform
Waveform output start condition(Note 3) The IFEj bit in the G1FE register should be set to "1" (channel j function enabled)
Waveform output stop condition
Interrupt request
OUTC1j pin(Note 3)
Selectable function
Note 1 : The waveform generation register of odd channel should have greater value than the one of even channel has.
Note 2 : When the G1PO0 register resets the base timer, the SR waveform generation function with channels 0 and 1
cannot be used.
Note 3 : The OUTC1
0
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
• Free-running operation
(the RST1, RTS2, and RST4 bits of the G1BCR1 and G1BCR0 registers are set
to "0" (no reset))
Cycle
Inverse level(Note 1)
• Setting bit RST1 to "1", and bits RST4 and RST2 to "0" enables the base
timer to be reset when its value matches the G1PO0 register(Note 2).
Likewise, setting bit RST4 to "1", and bits RST2 and RST1 to "0" enables the
base timer to be reset when its value matches the G1BTRR register.
Cycle
Inverse level(Note 1)
m : setting value of the G1POj register (j=0, 2, 4, 6 )
n : setting value of the G1POk register (k=j+1)
p : setting value of either G1PO0 register or G1BTRR register
all m, n, p: 0001
The IFEj bit should be set to "0" (channel j function disabled)
The G1IRj bit in the interrupt request register is set to "1" when value of the
base timer matches one of the G1POj registers.
The G1IRk bit in the interrupt request register is set to "1 " when value of the
base timer matches one of the G1POk registers (See Figure 13.10.)
Pulse output
• Default value set function : Output level is set when waveform output starts
• Inverse output function : Waveform level is inverted to output waveform from the
OUTC1j pin
, OUTC1
, OUTC14, OUTC1
2
page 159 of 402
13. Timer S (Input Capture / Output Compare)
Specification
65536
:
f
BT1
m-n
:
f
BT1
p+2
:
f
BT1
m-n
:
f
BT1
to FFFD
16
16
pins.
6
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