Figure 9.6 Output Waveform When Dadr = H'0207 (Os = 1) - Renesas H8S/2437 Hardware Manual

Base cycle
No. 0
Base pulse
High width: 2/256 × (T)

Figure 9.6 Output Waveform when DADR = H'0207 (OS = 1)

However, when CFS = 0 (base cycle = resolution (T) × 64), the duty cycle of the base pulse is
determined by the upper six bits and the locations of the additional pulses by the subsequent eight
bits with a method similar to as above.
1 conversion cycle
Base cycle
No. 1
Base pulse
2/256 × (T)
Base cycle
No. 63
Additional pulse output location
Additional pulse
1/256 × (T)
Rev. 1.00, 09/03, page 237 of 704