Flash Memory Enable Register (Fenr) - Renesas H8/3847R Series Hardware Manual

Section 6 ROM
6.6.5

Flash Memory Enable Register (FENR)

Bit 7
FLSHE
Initial value 0
Read/Write R/W
FENR controls CPU access to the flash memory control registers, FLMCR1, FLMCR2, EBR, and
FLPWCR.
Bit 7—Flash Memory Control Register Enable (FLSHE)
This bit controls access to the flash memory control registers.
Bit 7
FLSHE Description
0 Flash memory control registers cannot be accessed
1 Flash memory control registers can be accessed
Bits 6 to 0—Reserved
These bits are always read as 0 and cannot be modified.
Rev. 6.00 Aug 04, 2006 page 176 of 680
REJ09B0145-0600
6 5
— — —
0 0
— — —
4 3 2
— —
0 0 0
— —
1 0
— —
0 0
— —
(initial value)