Port A; Port A Data Direction Register (Paddr); Port A Output Data Register (Paodr) - Renesas H8S/2158 User Manual

Section 9 I/O Ports
9.10

Port A

Port A is a 2-bit I/O port. Port A pins also function as the address output, keyboard input, SCI_0
and SCI_2 external control pins. Pin functions are switched depending on the operating mode. Port
A has the following registers. PADDR and PAPIN have the same address.

• Port A data direction register (PADDR)

• Port A output data register (PAODR)

• Port A input data register (PAPIN)
9.10.1 Port A Data Direction Register (PADDR)
The individual bits of PADDR specify input or output for the pins of port A.
Bit Bit Name
7 to 2 —
1 PA1DDR
0 PA0DDR
9.10.2 Port A Output Data Register (PAODR)
PAODR stores output data for the port A pins.
Bit Bit Name
7 to 2 —
1 PA1ODR
0 PA0ODR
Rev. 3.00 Jan 25, 2006 page 254 of 872
REJ09B0286-0300
Initial Value R/W
All 0 (W)
0 W
0 W
Initial Value R/W
All 1 R/(W)
0 R/W
0 R/W
Description
Reserved
These bits cannot be modified.
In extended mode (mode 2):
The corresponding port A pins are address output
ports when the PADDR bits are set to 1, and input
ports when cleared to 0. Pins function as the
address output port depending on the setting of
bits IOSE and CS256E in SYSCR.
In single-chip mode or extended mode (mode 3):
The corresponding port A pins are output ports
when the PADDR bits are set to 1, and input ports
when cleared to 0.
Description
Reserved
These bits are always read as 1. The initial value
should not be changed.
PAODR stores output data for the port A pins that
are used as the general output port.