Table of Contents
Advertisement
3.2.4
System Control Register 3 (SYSCR3)
SYSCR3 selects the register map and interrupt vector.
Bit
Bit Name
7
—
6
EIVS*
5
RELOCATE
4 to 0 —
Note:
Switch the modes when an interrupt occurrence is disabled.
*
Initial
Value
R/W
Description
0
R/W
Reserved
The initial value should not be changed.
1
R/W
Extended interrupt Vector Select*
Selects compatible mode or extended mode for the
interrupt vector table.
0: H8S/2140B Group compatible vector mode
1: Extended vector mode
For details, see section 6, Interrupt Controller.
1
R/W
Register Address Map Select
Selects compatible mode or extended mode for the
register map.
When extended mode is selected for the register map,
CPU access for registers can be controlled without
using the KINWUE bit in SYSCR or the IICE bit in
STCR to switch the registers to be accessed.
0: H8S/2140B Group compatible register map mode
1: Extended register map mode
For details, see section 27, List of Registers.
All 0
R/W
Reserved
The initial value should not be changed.
Section 3 MCU Operating Modes
Rev. 1.00 May 09, 2008 Page 71 of 954
REJ09B0462-0100
Advertisement
Table of Contents
