Time Constant Register C (Tcorc); Input Capture Registers R And F (Ticrr And Ticrf) - Renesas H8S/2100 Series Hardware Manual

Bit Bit Name
1 OS1
0 OS0
Note: * Only 0 can be written, for flag clearing.
12.3.6

Time Constant Register C (TCORC)

TCORC is an 8-bit readable/writable register. The sum of contents of TCORC and TICR is always
compared with TCNT. When a match is detected, a compare-match C signal is generated.
However, comparison at the T
TICR is disabled. TCORC is initialized to H'FF.
12.3.7

Input Capture Registers R and F (TICRR and TICRF)

TICRR and TICRF are 8-bit read-only registers. While the ICST bit in TCONRI is set to 1, the
contents of TCNT are transferred at the rising edge and falling edge of the external reset input
(TMRIX) in that order. The ICST bit is cleared to 0 when one capture operation ends. TICRR and
TICRF are initialized to H'00.
Initial
Value R/W Description
0 R/W Output Select 1 and 0
0 R/W These bits specify how the TMOX pin output level is to
be changed by compare-match A of TCORA_X and
TCNT_X.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
state in the write cycle to TCORC and at the input capture cycle of
2
Section 12 8-Bit Timer (TMR)
Rev. 1.00 May 09, 2008 Page 331 of 954
REJ09B0462-0100