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Bit
Bit Name Initial Value R/W
1
OS1
0
0
OS0
0
Note:
* Only 0 can be written to clear the flag.
11.3.6
Input Capture Register (TICR)
TICR is an 8-bit register. The contents of TCNT are transferred to TICR at the falling edge of the
external reset input. TICR cannot be directly accessed by the CPU.
11.3.7
Time Constant Register (TCORC)
TCORC is an 8-bit readable/writable register. The sum of contents of TCORC and TICR is always
compared with TCNT. When a match is detected, a compare-match C signal is generated.
However, comparison at the T2 state of the TCORC write cycle and at the input capture cycle of
TICR is disabled. TCORC is initialized to H'FF.
11.3.8
Input Capture Registers R and F (TICRR and TICRF)
TICRR and TICRF are 8-bit read-only registers. The contents of TCNT are transferred at the
rising edge and falling edge of the external reset input (TMRIX) in that order. The ICST bit is
cleared to 0 when one capture operation ends. TICRR and TICRF are initialized to H'00.
Rev. 1.00, 09/03, page 282 of 704
Description
R/W
Output Select 1, 0
R/W
Specify how the TMOX pin output level is to be changed
by compare-match A of TCORAX and TCNTX.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
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