Table 10.36 TPU Interrupts
Channel Name
Interrupt Source
0
TGI0A
TGRA_0 input capture/compare match TGFA_0
TGI0B
TGRB_0 input capture/compare match TGFB_0
TGI0C
TGRC_0 input capture/compare match TGFC_0
TGI0D
TGRD_0 input capture/compare match TGFD_0
TGI0E
TCNT_0 overflow
1
TGI1A
TGRA_1 input capture/compare match TGFA_1
TGI1B
TGRB_1 input capture/compare match TGFB_1
TCI1V
TCNT_1 overflow
TCI1U
TCNT_1 underflow
2
TGI2A
TGRA_2 input capture/compare match TGFA_2
TGI2B
TGRB_2 input capture/compare match TGFB_2
TCI2V
TCNT_2 overflow
TCI2U
TCNT_2 underflow
3
TGI3A
TGRA_3 input capture/compare match TGFA_3
TGI3B
TGRB_3 input capture/compare match TGFB_3
TGI3C
TGRC_3 input capture/compare match TGFC_3
TGI3D
TGRD_3 input capture/compare match TGFD_3
TCI3V
TCNT_3 overflow
4
TGI4A
TGRA_4 input capture/compare match TGFA_4
TGI4B
TGRB_4 input capture/compare match TGFB_4
TCI4V
TCNT_4 overflow
TCI4U
TCNT_4 underflow
5
TGI5A
TGRA_5 input capture/compare match TGFA_5
TGI5B
TGRB_5 input capture/compare match TGFB_5
TCI5V
TCNT_5 overflow
TCI5U
TCNT_5 underflow
Notes: This table shows the initial state immediately after a reset. The relative channel priorities
can be changed by the interrupt controller.
* Not supported by the H8S/2366.
Rev. 2.00, 05/03, page 436 of 820
Interrupt
DTC
Flag
Activation
Possible
Possible
Possible
Possible
TCFV_0
Not possible Not possible
Possible
Possible
TCFV_1
Not possible Not possible
TCFU_1
Not possible Not possible
Possible
Possible
TCFV_2
Not possible Not possible
TCFU_2
Not possible Not possible
Possible
Possible
Possible
Possible
TCFV_3
Not possible Not possible
Possible
Possible
TCFV_4
Not possible Not possible
TCFU_4
Not possible Not possible
Possible
Possible
TCFV_5
Not possible Not possible
TCFU_5
Not possible Not possible
DMAC*
Activation
Possible
Not possible
Not possible
Not possible
Possible
Not possible
Possible
Not possible
Possible
Not possible
Not possible
Not possible
Possible
Not possible
Possible
Not possible