Operation In Asynchronous Mode - Renesas H8S/2100 Series Hardware Manual

Section 15 Serial Communication Interface (SCI)
15.4

Operation in Asynchronous Mode

Figure 15.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by transmit/receive data, a parity bit, and finally stop bits (high
level). In asynchronous serial communication, the transmission line is usually held in the mark
state (high level). The SCI monitors the transmission line, and when it goes to the space state (low
level), recognizes a start bit and starts serial communication. Inside the SCI, the transmitter and
receiver are independent units, enabling full-duplex communication. Both the transmitter and the
receiver also have a double-buffered structure, so that data can be read or written during
transmission or reception, enabling continuous data transfer and reception.
1
Serial
0
data
Start
bit
1 bit
Figure 15.2 Data Format in Asynchronous Communication
Rev. 1.00 Apr. 28, 2008 Page 424 of 994
REJ09B0452-0100
LSB
D0 D1 D2 D3
Transmit/receive data
7 or 8 bits
One unit of transfer data (character or frame)
(Example with 8-Bit Data, Parity, Two Stop Bits)
MSB
D4 D5 D6 D7
Parity
bit
1 bit or
none
Idle state
(mark state)
1
0/1 1 1
Stop bit
1 or 2 bits