Operation In Asynchronous Mode - Renesas RZ/A Series User Manual

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RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
14.4.2

Operation in Asynchronous Mode

In asynchronous mode, each transmitted or received character begins with a start bit and ends with a stop bit. Serial
communication is synchronized one character at a time.
The transmitting and receiving sections in this module are independent, so full duplex communication is possible. The
transmitter and receiver are 16-stage FIFO buffered, so data can be written and read while transmitting and receiving are
in progress, enabling continuous transmitting and receiving.
Figure 14.2 shows the general format of asynchronous serial communication.
In asynchronous serial communication, the communication line is normally held in the mark (high) state. This module
monitors the line and starts serial communication when the line goes to the space (low) state, indicating a start bit.
One serial character consists of a start bit (low), data (LSB first), parity bit (high or low), and stop bit (high), in that order.
When receiving in asynchronous mode, this module synchronizes at the falling edge of the start bit. This module samples
each data bit on the eighth or fourth pulse of a clock with a frequency 16 or 8 times the bit rate; receive data is latched at
the center of each bit.
1
Serial
data
Figure 14.2
Example of Data Format in Asynchronous Communication
(8-Bit Data with Parity and Two Stop Bits)
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
(LSB)
D 0
D 1
D 2
D 3
0
Start
bit
Transmit/receive data
1 bit
One unit of transfer data (character or frame)
14. Serial Communication Interface with FIFO
(MSB)
D 4
D 5
D 6
D 7
7 or 8 bits
Idle state (mark state)
1
0/1
1
1
Stop bit
Parity
bit
1 bit
1 or 2 bits
or
none
14-28

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