Table 3.2 Interrupt Sources And Their Priorities - Renesas H8/3847R Series Hardware Manual

Section 3 Exception Handling
Table 3.2 Interrupt Sources and Their Priorities
Interrupt Source Interrupt
RES
Reset
Watchdog timer
IRQ
IRQ
0
IRQ
IRQ
1
IRQ
IRQ
2
IRQ
IRQ
3
IRQ
IRQ
4
WKP WKP
0
WKP WKP
1
WKP WKP
2
WKP WKP
3
WKP WKP
4
WKP WKP
5
WKP WKP
6
WKP WKP
7
SCI1 SCI1 transfer complete
Timer A Timer A overflow
Asynchronous Asynchronous counter
counter overflow
Timer C Timer C overflow or
underflow
Timer FL Timer FL compare match
Timer FL overflow
Timer FH Timer FH compare match
Timer FH overflow
Timer G Timer G input capture
Timer G overflow
SCI3-1 SCI3-1 transmit end
SCI3-1 transmit data empty
SCI3-1 receive data full
SCI3-1 overrrun error
SCI3-1 framing error
SCI3-1 parity error
SCI3-2 SCI3-2 transmit end
SCI3-2 transmit data empty
SCI3-2 receive data full
SCI3-2 overrun error
SCI3-2 framing error
SCI3-2 parity error
A/D A/D conversion end
(SLEEP instruction Direct transfer
executed)
Note: Vector addresses H'0002 to H'0007 are reserved and cannot be used.
Rev. 6.00 Aug 04, 2006 page 96 of 680
REJ09B0145-0600
0
1
2
3
4
0
1
2
3
4
5
6
7
Vector Number Vector Address
0 H'0000 to H'0001 High
4 H'0008 to H'0009
5 H'000A to H'000B
6 H'000C to H'000D
7 H'000E to H'000F
8 H'0010 to H'0011
9 H'0012 to H'0013
10 H'0014 to H'0015
11 H'0016 to H'0017
12 H'0018 to H'0019
13 H'001A to H'001B
14 H'001C to H'001D
15 H'001E to H'001F
16 H'0020 to H'0021
17 H'0022 to H'0023
18 H'0024 to H'0025
19 H'0026 to H'0027
20 H'0028 to H'0029
Priority
Low