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Section 13 Serial Communication Interface (SCI)
13.3.5
Serial Mode Register (SMR)
SMR is used to set the SCI's serial transfer format and select the baud rate generator clock source.
Some bits in SMR have different functions in normal mode and smart card interface mode.
• Bit Functions in Normal Serial Communication Interface Mode (when SMIF in SCMR = 0)
Bit
Bit Name
7
C/A
6
CHR
5
PE
4
O/E
3
STOP
2
MP
Rev. 1.00 Mar. 12, 2008 Page 434 of 1178
REJ09B0403-0100
Initial
Value
R/W
Description
0
R/W
Communication Mode
0: Asynchronous mode
1: Clock synchronous mode
0
R/W
Character Length (enabled only in asynchronous mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is fixed and
the MSB of TDR is not transmitted in transmission.
In clock synchronous mode, a fixed data length of 8 bits is
used.
0
R/W
Parity Enable (enabled only in asynchronous mode)
When this bit is set to 1, the parity bit is added to transmit
data before transmission, and the parity bit is checked in
reception. For a multiprocessor format, parity bit addition
and checking are not performed regardless of the PE bit
setting.
0
R/W
Parity Mode (enabled only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity.
1: Selects odd parity.
0
R/W
Stop Bit Length (enabled only in asynchronous mode)
Selects the stop bit length in transmission.
0: 1 stop bit
1: 2 stop bits
In reception, only the first stop bit is checked. If the
second stop bit is 0, it is treated as the start bit of the next
transmit frame.
0
R/W
Multiprocessor Mode (enabled only in asynchronous
mode)
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit and O/E bit
settings are invalid in multiprocessor mode.
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