Ep3 Interrupt-In Transfer - Renesas H8S Family Hardware Manual

22.5.7

EP3 Interrupt-In Transfer

IN token reception
Data transmission to host
Set EP3 transmission
(IFR1.EP3 TS = 1)
Note: This flowchart shows just one example of interrupt transfer processing. Other possibilities include an
operation flow in which, if there is data to be transferred, the EP3 DE bit in the data status register is
referenced to confirm that the FIFO is empty, and then data is written to the FIFO.
Figure 22.17 Operation of EP3 Interrupt-In Transfer
USB function
No
Valid data
in EP3FIFO?
NAK
Yes
ACK
Interrupt request
complete flag
Section 22 USB Function Module (USB)
Application
Is there data
for transmission
to host?
Yes
Write data to EP3 data
register (EPDR3)
Write 1 to EP3 packet
enable bit
(TRG.EP3 PKTE = 1)
Clear EP3 transmission
complete flag
(IFR1.EP3 TS = 0)
Is there data
for transmission
to host?
Yes
Write data to EP3 data
register (EPDR3)
Write 1 to EP3 packet
enable bit
(TRG.EP3 PKTE = 1)
Rev. 1.00 Mar. 12, 2008 Page 881 of 1178
No
No
REJ09B0403-0100