Basic Operation Timing In Normal Extended Mode - Renesas H8S Family Hardware Manual

6.5.4

Basic Operation Timing in Normal Extended Mode

(1) 8-Bit, 2-State Access Space
Figure 6.5 shows the bus timing for an 8-bit, 2-state access space. When an 8-bit access space is
accessed, the upper half (D15 to D8) of the data bus is used. Wait states cannot be inserted.
Address bus
IOS (IOSE = 1)
CS256 (CS256E = 1)
AS (IOSE = 0)
*
Read
Write
Note: * For external address space access, this signal is not output when the 256-Kbyte extended area
is accessed with CS256E = 1.
Figure 6.5 Bus Timing for 8-Bit, 2-State Access Space
φ
RD
D15 to D8
D7 to D0
HWR
D15 to D8
Bus cycle
T T
1 2
Invalid
Valid
Rev. 1.00 Mar. 12, 2008 Page 129 of 1178
Section 6 Bus Controller (BSC)
Valid
REJ09B0403-0100