Download Print this page

Transceiver Test Register 0 (Trntreg0) - Renesas H8S Family Hardware Manual

Advertisement

Section 22 USB Function Module (USB)

22.3.26 Transceiver Test Register 0 (TRNTREG0)

TRNTREG0 controls the built-in transceiver output signals. Setting the PTSTE bit to 1 specifies
the transceiver output signals (USD+ and USD-) arbitrarily. Table 22.4 shows the relationship
between TRNTREG0 setting and pin output.
Bit
Bit Name
7
PTSTE
6 to 4
3
SUSPEND
2
txenl
1
txse0
0
txdata
Rev. 1.00 Mar. 12, 2008 Page 860 of 1178
REJ09B0403-0100
Initial
Value
R/W
Description
0
R/W
Pin Test Enable
Enables the test control for the built-in transceiver
output pins (USD+ and USD-).
Reserved
All 0
R
These bits are always read as 0. The initial value
should not be changed.
0
R/W
Built-In Transceiver Output Signal Setting
0
R/W
SUSPEND: Sets the (SUSPEND) signal of the built-in
0
R/W
txenl:
0
R/W
txse0:
txdata:
transceiver.
Sets the output enable (txenl) signal of the
built-in transceiver.
Sets the Signal-ended 0 (txse0) signal of
the built-in transceiver.
Sets the (txdata) signal of the built-in
transceiver.

Advertisement

loading

This manual is also suitable for:

R4f2472R4f2462H8s/2462H8s/2400 seriesH8s/2472