Bt Status Register 1 (Btsr1) - Renesas H8S Family Hardware Manual

19.3.26 BT Status Register 1 (BTSR1)

BTSR1 is one of the registers used to implement the BT mode. This register includes a flag that
controls an interrupt to the slave (this LSI).
Bit Bit Name Initial Value Slave Host Description

7 0
6 HRSTI 0
5 IRQCRI 0
R/W

R/W
Reserved
The initial value should not be changed.
R/(W)* 
BT Reset Interrupt
This status flag indicates that the BMC_HWRST bit
in BTIMSR is set to 1 by the host. When the IBFIE3
bit and HRSTIE bit are set to 1, IBFI3 interrupt is
requested to the slave.
0: [Clearing condition]
When the slave reads HRSTI = 1 and writes 0 to
this bit.
1: [Setting condition]
When the slave detects the rising edge of
BMC_HWRST.
R/(W)* 
B2H_IRQ Clear Interrupt
This status flag indicates that the B2H_IRQ bit in
BTIMSR is cleared by the host. When the IBFIE3 bit
and IRQCRIE bit are set to 1, IBFI3 interrupt is
requested to the slave.
0: [Clearing condition]
When the slave reads IRQCRI = 1 and writes 0 to
this bit.
1: [Setting condition]
When the slave detects the falling edge of
B2H_IRQ.
Section 19 LPC Interface (LPC)
Rev. 1.00 Mar. 12, 2008 Page 721 of 1178
REJ09B0403-0100