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Section 19 LPC Interface (LPC)
• Supports SERIRQ
Host interrupt requests are transferred serially on a single signal line (SERIRQ).
On channel 1, HIRQ1 and HIRQ12 can be generated.
On channels 2 and 3, SMI, HIRQ6, and HIRQ9 to HIRQ11 can be generated.
In the SCIF, SMI, and HIRQ1 to HIRQ15 can be generated.
Operation can be switched between quiet mode and continuous mode.
The CLKRUN signal can be manipulated to restart the PCI clock (LCLK).
• Power-down modes and interrupts
The LPC module can be shut down by inputting the LPCPD signal.
Three pins, PME, LSMI, and LSCI, are provided for general input/output.
• Supports version 1.5 of the Intelligent Platform Management Interface (IPMI) specifications
Channel 3 supports the SMIC interface, KCS interface, and BT interface.
Rev. 1.00 Mar. 12, 2008 Page 666 of 1178
REJ09B0403-0100
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