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Section 8 I/O Ports
(2)
Port 8 Data Register (P8DR)
P8DR stores output data for the port 8 pins.
Bit
Bit Name
7
P87DR
6
P86DR
5
P85DR
4
P84DR
3
P83DR
2
P82DR
1
P81DR
0
P80DR
(3)
Pin Functions
The relationship between register setting values and pin functions are as follows.
• P87/ExIRQ15/TxD3/ADTRG
The pin function is switched as shown below according to the combination of the TE bit in
SCR of SCI_3, the SMIF bit in SCMR, and the P87DDR bit.
When the TRGS1 and EXTRGS bits are both set to 1 and the TRGS0 bit is cleared to 0 in
ADCR of the A/D converter, this pin can be used as the ADTRG input pin.
When the ISS15 bit in ISSR16 is set to 1, this pin can be used as the ExIRQ15 input pin. To
use this pin as the ExIRQ15 input pin, clear the P87DDR bit to 0.
P87DDR
SMIF
TE
Pin function
[Legend] X: Don't care.
Rev. 1.00 Mar. 12, 2008 Page 230 of 1178
REJ09B0403-0100
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
0
0
X
P87 input pin
ExIRQ15 input pin/
ADTRG input pin
Description
P8DR stores output data for the port 8 pins that are
used as the general output port.
If this register is read, the P8DR values are read for
the bits with the corresponding P8DDR bits set to 1.
For the bits with the corresponding P8DDR bits
cleared to 0, the pin states are read.
1
0
0
P87 output pin
1
1
0
X
1
TxD3 output pin
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