Interrupt Enable Register 0 (Ier0) - Renesas H8S Family Hardware Manual

Section 22 USB Function Module (USB)
22.3.7

Interrupt Enable Register 0 (IER0)

IER0 enables the interrupt requests of interrupt flag register 0 (IFR0). When an interrupt flag is set
to 1 while the corresponding bit of each interrupt is set to 1, an interrupt request is sent to the
CPU. The interrupt vector number is determined by the contents of interrupt select register 0
(ISR0).
Bit Bit Name
7 BRST
6 EP1 FULL
5 EP2 TR
4 EP2 EMPTY
3 SETUP TS
2 EP0o TS
1 EP0i TR
0 EP0i TS
22.3.8 Interrupt Enable Register 1 (IER1)
IER1 enables the interrupt requests of interrupt flag register 1 (IFR1). When an interrupt flag is set
to 1 while the corresponding bit of each interrupt is set to 1, an interrupt request is sent to the
CPU. The interrupt vector number is determined by the contents of interrupt select register 1
(ISR1).
Bit Bit Name

7 to 3
2 EP3 TR
1 EP3 TS
0 VBUSF
Rev. 1.00 Mar. 12, 2008 Page 842 of 1178
REJ09B0403-0100
Initial
Value R/W Description
0 R/W Bus Reset
0 R/W EP1 FIFO Full
0 R/W EP2 Transfer Request
0 R/W EP2 FIFO Empty
0 R/W Setup Command Receive Complete
0 R/W EP0o Receive Complete
0 R/W EP0i Transfer Request
0 R/W EP0i Transmission Complete
Initial
Value R/W Description
All 0 R Reserved
These bits are always read as 0. The initial value
should not be changed.
0 R/W EP3 Transfer Request
0 R/W EP3 Transmission Complete
0 R/W USB Bus Connect