Advertisement
Section 10 16-Bit Free-Running Timer (FRT)
10.2.7
Timer Output Compare Control Register (TOCR)
TOCR enables output from the output compare pins, selects the output levels, switches access
between output compare registers A and B, and controls the OCRA operating modes.
Bit
Bit Name
7
6
OCRAMS
5
ICRS
4
OCRS
3 to 0
Rev. 1.00 Mar. 12, 2008 Page 380 of 1178
REJ09B0403-0100
Initial
Value
R/W
Description
0
R
Reserved
This bit is always read as 0 and cannot be modified.
0
R/W
Output Compare A Mode Select
Specifies whether OCRA is used in the normal operating
mode or in the operating mode using OCRAR and
OCRAF.
0: The normal operating mode is specified for OCRA
1: The operating mode using OCRAR and OCRAF is
specified for OCRA
0
R/W
Input Capture Register Select
Controls the access to OCRAR and OCRAF.
0: Access is disabled
1: Access is enabled
0
R/W
Output Compare Register Select
OCRA and OCRB share the same address. When this
address is accessed, the OCRS bit selects which register
is accessed. The operation of OCRA or OCRB is not
affected.
0: OCRA is selected
1: OCRB is selected
All 0
R
Reserved
These bits are always read as 0 and cannot be modified.
Advertisement
