Renesas H8S Family Hardware Manual page 64

Section 1 Overview
Type Symbol
WR
Bus control
HBE
LBE
AH
ETRST
Boundary
scan
ETMS
ETDO
ETDI
ETCK
14-bit PWM PWX0 to
timer PWX3
(PWMX) ExPWX0 to
ExPWX2
Serial TxD1, TxD3
communi-
RxD1, RxD3
cation
SCK1, SCK3 R5, M6
interface
(SCI_1 and
SCI_3)
Serial TxDF
communi-
RxDF
cation
CTS
interface
RTS
with FIFO
(SCIF)
DTR
DSR
RI
DCD
Rev. 1.00 Mar. 12, 2008 Page 16 of 1178
REJ09B0403-0100
Pin No.
176-Pin 144-Pin
C1 6
22
H2
24
J3
J4 23
G12 91
H12 87
H13 88
H15 89
H14 90
M13, 78 to 81,
N15, 21, 20, 10
M14, L12,
H3, H4,
E3
A7, N5 135, 43
B7, P5 136, 44
45, 46
G4 16
F2 15
M15 82
L13 83
F15 95
F14 96
E13 97
E15 98
I/O Name and Function
Output Low level on this pin indicates that the
MCU is writing to an external address
space.
Output Low level on this pin indicates that the
MCU is accessing an external address
space.
The upper byte of the data bus is valid.
Output Low level on this pin indicates that the
MCU is accessing an external address
space.
The lower byte of the data bus is valid.
Output Address latch signal for the address-data
multiplex bus
Input Boundary scan interface pins
Input
Output
Input
Input
Output PWM D/A pulse output pins
Output Transmit data output pins
Input Receive data input pins
Clock input/output pins.
Input/
Output
Output Transmit data output pin
Input Receive data input pin
Input Transmit grant input pin
Output Transmit request output pin
Output Data terminal ready output pin
Input Data set ready input pin
Input Ring indicator input pin
Input Data carrier detection input pin