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6.3.2
Bus Control Register 2 (BCR2)
BCR2 is used to specify the access mode for the extended area.
Bit
Bit Name
7, 6
5, 4
3
ADFULLE
2
EXCKS
1
0
Initial
Value
R/W
Description
All 0
R/W
Reserved
The initial value should not be changed.
All 1
R/W
Reserved
The initial value should not be changed.
0
R/W
Address Output Full Enable
Controls the address output, A23 to A21, in access to the
extended area. See section 8, I/O Ports. This is not
supported while ADMXE = 1.
0
R/W
External Extension Clock Select
Selects the operating clock used in external extended
area access.
0: Medium-speed clock is selected as the operating clock
1: System clock (φ) is selected as the operating clock.
The operating clock is switched in the bus cycle prior to
external extended area access.
1
R/W
Reserved
The initial value should not be changed.
0
R/W
Reserved
The initial value should not be changed.
Section 6 Bus Controller (BSC)
Rev. 1.00 Mar. 12, 2008 Page 111 of 1178
REJ09B0403-0100
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