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• STR3 (TWRE = 1 or SELSTR3 = 0)
Bit
Bit Name Initial Value Slave Host Description
7
IBF3B
0
6
OBF3B
0
5
MWMF
0
4
SWMF
0
R/W
R
R
Bidirectional Data Register Input Buffer Full Flag
This is an internal interrupt source to the slave (this
LSI).
0: [Clearing condition]
When the slave reads TWR15
1: [Setting condition]
When the host writes to TWR15 in I/O write cycle
R/(W)* R
Bidirectional Data Register Output Buffer Full Flag
0: [Clearing conditions]
•
When the host reads TWR15 in I/O read cycle
•
When the slave writes 0 to the OBF3B bit
1: [Setting condition]
When the slave writes to TWR15
R
R
Master Write Mode Flag
0: [Clearing condition]
When the slave reads TWR15
1: [Setting condition]
When the host writes to TWR0 in I/O write cycle
while SWMF = 0
R/(W)* R
Slave Write Mode Flag
In the event of simultaneous writes by the master
and the slave, the master write has priority.
0: [Clearing conditions]
•
When the host reads TWR15 in I/O read cycle
•
When the slave writes 0 to the SWMF bit
1: [Setting condition]
When the slave writes to TWR0 while MWMF = 0
Section 19 LPC Interface (LPC)
Rev. 1.00 Mar. 12, 2008 Page 695 of 1178
REJ09B0403-0100
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