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Renesas H8S Family Hardware Manual page 948

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Section 23 A/D Converter
Bit
Bit Name
5
ADST
4
3
2
CH2
1
CH1
0
CH0
Note:
* Only 0 can be written to clear the flag.
[Legend] x: Don't care
Rev. 1.00 Mar. 12, 2008 Page 900 of 1178
REJ09B0403-0100
Initial
Value R/W
Description
0
R/W
A/D Start
Clearing this bit to 0 stops A/D conversion and enters the idle
state. Setting this bit to 1 starts A/D conversion. In single
mode, this bit is cleared to 0 automatically when conversion
on the specified channel ends. In scan mode, conversion
continues sequentially on the specified channels until this bit
is cleared to 0 by software, a reset, or a transition to the
hardware standby mode.
0
R
Reserved
This is a read-only bit and cannot be modified.
0
R/W
Reserved
This bit is always read as 0. The initial value should not be
changed.
All 0
R/W
Channel Select 2 to 0
Select analog input channels together with the SCANE bit
and the SCANS bit of ADCR.
When SCANE = 0,
and SCANS = x
000: AN0
001: AN1
010: AN2
011: AN3
100: AN4
101: AN5
110: AN6
111: AN7
When SCANE = 1
When SCANE = 1
and SCANS = 0
and SCANS = 1
000: AN0
000: AN0
001: AN0 and AN1
001: AN1 and AN1
010: AN0 to AN2
010: AN0 to AN2
011: AN0 to AN3
011: AN0 to AN3
100: AN4
100: AN0 to AN4
101: AN4 and AN5
101: AN0 to AN5
110: AN4 to AN6
110: AN0 to AN6
111: AN4 to AN7
111: AN0 to AN7

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