Advertisement
(b)
Single-Chip Mode and Address-Data Multiplex Extended Mode
Port A pins can also function as interrupt input and event counter input pins.
• PA7/ExIRQ7/EVENT7/EXOUT
The pin function is switched as shown below according to the PA7DDR bit.
Setting the ISS7 bit in ISSR makes the pin to function as the ExIRQ7 input pin.
When using this pin as the ExIRQ7 input or EVENT7 input pin, clear the PA7DDR bit to 0.
Though the settings for the EVENT input pin have been made, set the PA7DDR bit to 1 to use
the pin as the PA7 output pin.
When the module stop mode is cleared in both the EtherC and E-DMAC, this pin functions as
the EXOUT output pin.
PA7DDR
Pin function
ExIRQ7 input pin/EVENT7 input pin
• PA6/ExIRQ6/EVENT6/LNKSTA
The pin function is switched as shown below according to the PA6DDR bit.
Setting the ISS6 bit in ISSR makes the pin to function as the ExIRQ6 input pin.
When using this pin as the ExIRQ6 input, EVENT6 input, input pin, clear the PA6DDR bit to
0. Though the settings for the EVENT input pin have been made, set the PA6DDR bit to 1 to
use the pin as the PA6 output pin.
When the module stop mode is cleared in both the EtherC and E-DMAC, this pin functions as
the LNKSTA input pin.
PA6DDR
Pin function
ExIRQ6 input pin/EVENT6 input pin
0
PA7 input pin
0
PA6 input pin
Section 8 I/O Ports
1
PA7 output pin
1
PA6 output pin
Rev. 1.00 Mar. 12, 2008 Page 243 of 1178
REJ09B0403-0100
Advertisement
