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Section 18 I
C Bus Interface (IIC)
Table 18.6 Output Data Hold Time
SMBnE FSEL1
FSEL0
0
1
0
0
1
1
0
1
Notes:
n = 0 to 5
* Since the value is outside the SMBus specification, it should not be set.
Table 18.7 ISCMBCR Setting
System Clock
20 MHz
20 to 34 MHz
n = 0 to 5
Rev. 1.00 Mar. 12, 2008 Page 616 of 1178
REJ09B0403-0100
φ = 20 MHz
Min./Max.
Min.
100*
Max.
150*
Min.
150*
Max.
250*
Min.
200*
Max.
350
Min.
300
Max.
550
Min.
500
Max.
950
SMBnE
1
1
Output Data Hold Time (ns)
φ = 25 MHz
80*
120*
120*
200*
160*
280*
240*
440
400
760
FSEL1
1
1
φ = 34 MHz
59*
88*
88*
147*
118*
206*
176*
324
294*
559
FSEL0
0
1
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