Serial Mode Register (Smr) - Renesas H8 Series Hardware Manual

10.2.5

Serial Mode Register (SMR)

Bit 7
COM
Initial value 0
Read/Write R/W
SMR is an 8-bit register used to set the serial data transfer format and to select the clock source for
the baud rate generator.
SMR can be read or written by the CPU at any time.
SMR is initialized to H'00 upon reset, and in standby, module standby, or watch mode.
Bit 7—Communication Mode (COM)
Bit 7 selects whether SCI3 operates in asynchronous mode or synchronous mode.
Bit 7
COM Description
0 Asynchronous mode
1 Synchronous mode
Bit 6—Character Length (CHR)
Bit 6 selects either 7 or 8 bits as the data length to be used in asynchronous mode. In synchronous
mode the data length is always 8 bits, irrespective of the bit 6 setting.
Bit 6
CHR Description
8-bit data/5-bit data *
0
7-bit data *
1
Notes: 1. When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted.
2. When 5-bit data is selected, set both PE and MP to 1. The three most significant bits
(bits 7, 6, and 5) of TDR are not transmitted.
6 5
CHR PE
0 0
R/W R/W
2
1 2
/5-bit data *
Section 10 Serial Communication Interface
4 3 2
PM STOP MP
0 0 0
R/W R/W R/W
Rev. 7.00 Mar 10, 2005 page 337 of 652
1 0
CKS1 CKS0
0 0
R/W R/W
(initial value)
(initial value)
REJ09B0042-0700