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19.5.2
SMI, HIRQ1, HIRQ3, HIRQ4, HIRQ5, HIRQ6, HIRQ7, HIRQ8, HIRQ9,
HIRQ10, HIRQ11, HIRQ12, HIRQ13, HIRQ14, and HIRQ15
The LPC interface can request 15 kinds of host interrupt by means of SERIRQ. HIRQ1 and
HIRQ12 are used on LPC channel 1, while SMI, HIRQ6, HIRQ9, HIRQ10, and HIRQ11 can be
requested from LPC channels 2 and 3. For the SCIF, any one of 15 types of interrupts can be
selected. In addition, by the setting of SCIFCR4, the SCIF can request eight types of host
interrupts: HIRQ3, HIRQ4, HIRQ5, HIRQ7, HIRQ8, HIRQ13, HIRQ14, and HIRQ15.
There are two ways of clearing a host interrupt request when the LPC channels are used.
When the IEDIR bit in SIRQCR0is cleared to 0, host interrupt sources and LPC channels are all
linked to the host interrupt request enable bits. When the OBF flag is cleared to 0 by a read of
ODR or TWR15 by the host in the corresponding LPC channel, the corresponding host interrupt
enable bit is automatically cleared to 0, and the host interrupt request is cleared.
When the IEDIR bit is set to 1 in SIRQCR, a host interrupt is only requested by the host interrupt
enable bits. The host interrupt enable bit is not cleared when OBF is cleared. Therefore, SMIE2,
SMIE3A, SMIE3B, SMIE4 and IRQ6En, IRQ9En, IRQ10En, IRQ11En lose their respective
functional differences (n = 2, 3). In order to clear a host interrupt request, it is necessary to clear
the host interrupt enable bit. As for HIRQ3 to HIRQ5, HIRQ7, HIRQ8, and HIRQ13 to HIRQ15,
setting the enable bit in SIRQCR4 to 1 requests the corresponding host interrupt, and clearing the
enable bit to 0 clears the corresponding host interrupt request.
When the SCIF channels are used, a host interrupt request is cleared when the relevant SCIF
interrupt is cleared.
Table 19.12 summarizes the methods of setting and clearing these bits when the LPC channels are
used, and table 19.13 summarizes the methods of setting and clearing these bits when the SCIF
channels are used. Figure 19.12 shows the processing flowchart.
Section 19 LPC Interface (LPC)
Rev. 1.00 Mar. 12, 2008 Page 751 of 1178
REJ09B0403-0100
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