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13.2.5
Serial Mode Register (SMR)
SMR is an 8-bit register that specifies the SCI serial communication format and selects the clock
source for the baud rate generator.
Bit
7
C/A
Initial value
0
Read/Write
R/W
Communication mode
Selects asynchronous or synchronous mode
The CPU can always read and write SMR. SMR is initialized to H'00 by a reset and in standby
mode.
Bit 7—Communication Mode (C/A A A A ): Selects whether the SCI operates in asynchronous or
synchronous mode.
Bit 7: C/A A A A
Description
0
Asynchronous mode
1
Synchronous mode
6
5
CHR
PE
O/E
0
0
R/W
R/W
R/W
Parity mode
Selects even or odd parity
Parity enable
Selects whether a parity bit is added
Character length
Selects character length in asynchronous mode
Section 13 Serial Communication Interface
4
3
2
STOP
MP
0
0
0
R/W
R/W
Multiprocessor mode
Selects the multiprocessor
function
Stop bit length
Selects the stop bit length
Rev. 3.00 Mar 21, 2006 page 441 of 814
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock select 1/0
These bits select the
baud rate generator's
clock source
(Initial value)
REJ09B0302-0300
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